The present invention relates to a solder bump forming method for forming solder bumps on substrates of various kinds, to an electronic component mounting method, and to an electronic component mounting structure.
As used herein, the term xe2x80x9csubstratexe2x80x9d is not limited to the narrow definition of printed circuit boards, wafers, and the like, but is defined broadly to include all manner of materials permitting formation of solder bumps thereon.
Demand for ever higher electronic component mounting densities in recent years has led to a switch in electronic component mounting processes from face-up techniques employing wire bonding to face-down techniques using solder bumps. Typical conventional methods for solder bump formation include plating processes and vapor deposition processes. Such methods, however, have the drawback of requiring large and expensive equipment, and do not allow for easy control of solder bump height and solder composition.
Past proposals for solving this problem include the use of heat-resistant insulating film (JP-A-1-161850) and the use of sheets (JP-A-9-116257).
Referring to accompanying FIG. 9a, according to the solder bump forming method of JP-A-1-161850, a board 9 on which solder bumps are to be formed has as structure wherein a glass film surface layer 92 has been formed covering the aluminum metallization 91 on the surface of the board proper 90, and electrodes 94 have been situated within recesses 93 provided in this surface layer 92. To form solder bumps on board 9, first, an insulating film 95 is formed over surface layer 92 as shown in FIG. 9b. This insulating film 95 is formed by applying a liquid resin over the entire surface of surface layer 92 and electrodes 94 and then etching the resin from the surfaces of the electrodes 94. By this process recesses 93xe2x80x2 that are deeper than recesses 93 are formed above electrodes 94. Recesses 93xe2x80x2 are then filled with solder paste 5e as shown in FIG. 9c, and the solder is then heated to re-melt it, and then hardened. With this method, the depthwise dimension of recesses 93xe2x80x2 is increased by formation of a dielectric layer 95 over surface layer 92 allowing the amount of solder paste packed into recesses 93xe2x80x2 to be increased. As a result, it is possible to produce protruding solder bumps 50, as shown in FIG. 9d. 
However, the method depicted in FIGS. 9a-9d has a number of drawbacks, such as the following. Since dielectric layer 95 is formed over surface layer 92 by a process of applying a liquid resin over the entire surface of surface layer 92 and electrodes 94 and then etching portions thereof, it is difficult to accurately produce a finished dielectric layer 95 having predetermined thickness t throughout. It is accordingly a difficult matter to ensure that the plurality of recesses 93xe2x80x2 have uniform depth at all locations, and this tends to result in significant variation in height of the plurality of solder bumps 50 formed subsequently. Height variation of solder bumps 50 is undesirable in terms of achieving electrical interconnection with other components via the solder bumps.
Where solder bumps are utilized for electrical interconnection with other components, it is sometimes necessary to use large amounts of solder in order to make the solder bumps as tall as possible. With the conventional method described above, however, there exists a certain limit as to the thickness t of the insulating film 95 that can formed by application of liquid resin, and this in turn prevents recesses 93xe2x80x2 from being made very deep. It is accordingly difficult to form solder bumps 50 of height exceeding a certain given height. A further drawback of the conventional method is that if is attempted to increase total insulating film thickness by forming an additional insulating film layer over insulating film 95 in the same manner, the liquid resin becomes thickly applied in recesses 93xe2x80x2 as well during application of the resin to produce the dielectric layer, and it is difficult to properly etch the resin in these areas.
The solder bump forming method disclosed in JP-A-9-116257, on the other hand, employs a sheet 8 having openings 80 therein, as shown in FIG. 10a. To form solder bumps, a mask sheet 81 is first superposed on sheet 8 as shown in FIG. 10b, using the mask sheet 81 to pack solder paste 5f into the openings 80 of sheet 8. The mask sheet 81 is then separated from sheet 8 as shown in FIG. 10c. Next, as shown in FIG. 10d, sheet 8 is arranged on a substrate 82 with solder paste 5f situated over electrodes 83. Heating and re-melting solder paste 5f in this state produces solder bumps 51 as shown in FIG. 10d. Sheet 8 is subsequently removed from substrate 82 as shown in FIG. 10f. This method allows sheet 8 to be reused in a plurality of solder bump forming operations, and additionally allows depth and diameter of openings 80 of sheet 8 to be made uniform throughout.
However, the conventional method depicted in FIGS. 10a-10f requires prefabrication of a sheet 8 having a plurality of openings 80 corresponding in arrangement to the arrangement of the plurality of electrodes 83 on substrate 82. Further, fabrication of sheet 8 requires an operation totally separate from the process for forming electrodes 83 on substrate 82. Thus, in addition to the labor entailed in fabricating sheet 8, fabrication of sheet 8 becomes increasingly difficult at the smaller pitch of the plurality of electrodes 83 needed for smaller integrated circuit patterns. Smaller pitch of the plurality of electrodes 83 also results in reduced precision of alignment of the plurality of electrodes 83 and the plurality of openings 80 in sheet 8. As a result, this latter method has the drawback of difficulty in precisely aligning solder paste 5f over electrodes 83 at smaller pitches of the plurality of electrodes 83, and poses the risk of unwanted conduction between adjacent solder bumps 51, 51.
JP-A-7-273439 discloses a solder bump forming method whereby the drawbacks of the two preceding conventional methods may be overcome. The solder bump forming method disclosed in this publication involves first forming a first solder resist layer on the surface of a board having a circuit pattern formed thereon, and then etching this first solder resist layer to produce openings in locations corresponding to the locations of electrodes in the circuit pattern. A second solder resist layer is then applied to the surface of the first solder resist layer, and this second solder resist layer is etched to produce openings in locations corresponding to the openings in the first solder resist layer. The openings in the two solder resist layers are then filled with solder paste, which is heated/re-melted and then hardened to produce solder bumps on the electrodes in the circuit pattern. Finally, the second solder resist layer is dissolved away using a dissolving liquid that dissolves the second solder resist layer without dissolving the first solder resist layer.
With this method, the thickness of the first solder resist layer and the thickness of the second solder resist layer are utilized to create greater depth in the recesses (the openings formed by the two solder resist layers) into which the solder paste is packed, thus allowing solder bumps of sufficient size to be formed. Since the first solder resist layer remains after the second solder resist layer has been dissolved away, shorting between solder bumps is prevented, so the process is adaptable to finer pitch between electrodes.
According to the method disclosed in JP-A-7-273439, however, if the board and the second solder resist layer are based on the same type of resin, the board will partially dissolve during the process of dissolving the second solder resist layer, resulting in defects. Further, the need for a process to dissolve away the second solder resist layer cannot be said to represent process efficiency. It is further necessary to align the solder bumps on the electronic component with the solder bumps on the board during bonding of electronic components, and product reliability may suffer if alignment defects should occur.
With the foregoing in view, it is an object of the invention to provide a solder bump forming process affording precise formation of a plurality of solder bumps of predetermined height by means of a simple procedure, while avoiding unwanted dissolution of the substrate, even if the substrate should comprise a resin.
It is a further object of the invention to provide a method and structure whereby electronic components may be mounted on a substrate in an efficient manner without the need for a process to dissolve away the resin layer used to form the solder bumps.
In a first aspect the invention provides a solder bump forming method comprising the steps of: packing solder into a plurality of recesses provided to the surface layer of a substrate; and melting/hardening the solder to form solder bumps within said recesses, said method having the steps of: in a step coming prior to packing solder into said plurality of recesses, adhering or arranging a film over said surface layer; and producing in said film a plurality of window portions communicating with said plurality of recesses; wherein said film is composed of a material based on a component different than the material of which said substrate is composed.
According to this first aspect of the invention, in a step coming prior to packing solder into the plurality of recesses in the surface layer of a substrate, a film is adhered or arranged over the surface layer and a plurality of window portions communicating with the plurality of recesses are formed in the film, whereby the plurality of window portions provided in the film may also be filled with solder when packing solder into the plurality of recesses in the film. It is accordingly possible to increase the height of solder positioned over the electrodes on the substrate so as to afford proper formation of protruding solder bumps through hardening of the solder subsequent to melting thereof. Where a film of uniform thickness throughout is employed, the plurality of window portions provided in the film will of necessity be uniform throughout as well, whereby solder positioned over the electrodes on the substrate may be imparted with uniform given height. It is accordingly possible to avoid significant variation in the height dimension among the plurality of solder bumps. Solder bump height herein corresponds in dimension to the thickness of the film, and it is therefore a simple matter to set solder bumps to predetermined height. Solder bump height may be increased further by either using a thicker film, or stacking a plurality of films.
Further, since the material of the film is different from the material of the substrate, unwanted penetration into the substrate when the film is dissolved away with a dissolving liquid is avoided. From this standpoint, where the substrate consists, for example, of epoxy resin, the film may be composed of an acrylic or imide resin. By simply placing (instead of adhering) the film on the substrate surface layer, the film may be easily stripped away once the solder bumps have been formed, reducing the likelihood of connection defects due to film residue adhering to electrodes.
In preferred embodiment, the substrate surface layer comprises a resist layer located on the surface of the substrate proper, and this resist layer is exposed and developed to produce openings located above the electrodes.
In preferred embodiment, the film is photosensitive, and the step of forming a plurality of window portions in the film is a step of exposing and developing the film. Alternatively, the step of forming a plurality of window portions in the film is a step of irradiating the film with a laser.
In preferred embodiment, the process of packing solder into recesses in the substrate surface layer with will be carried out by packing solder paste, solder powder, or molten solder therein through the window portions in the film. Where molten solder is used for filling, the substrate may be immersed in a molten solder bath under normal or reduced pressure after window portions have been formed in the film.
In a second aspect the invention provides an electronic component mounting method for mounting electronic components on a substrate having a surface layer with a plurality of recesses formed therein, and connecting via solder the electrodes of these electronic components with electrodes situated within the recesses, said method comprising the steps of: in a step coming prior to mounting electronic components on said substrate, adhering or arranging a film over the surface layer; producing in said film a plurality of window portions communicating with said plurality of recesses; and packing solder into said plurality of window portions and said plurality of recesses; wherein said solder is melted subsequent to mounting electronic components on said substrate.
According to the mounting method herein, electronic components are already mounted on the substrate when the solder arranged over the electrodes is melted, so when the solder is melted, the solder affords mechanical and electrical connection between electrodes of electronic components and electrodes on the substrate. Thus the need to form solder bumps independently on the substrate or to remove the film is obviated, allowing electronic components to be mounted on substrates with fewer process steps. This increases the efficiency of electronic component mounting operations. Additionally, since the window portions of the film can be utilized for positioning solder bumps on the electronic components, alignment is easier than with bump-to-bump alignment, improving reliability.
The process steps of the electronic component mounting method provided by a second aspect of the invention up through the step of packing solder into the plurality of recesses formed in the surface layer of the substrate are the same as the process steps of the solder bump forming method provided by a second aspect of the invention, and the advantages thereof are therefore similar to those afforded by the first aspect of the invention described earlier. That is, according to the electronic component mounting method provided by a second aspect of the invention, a plurality of window portions in the film applied to or arranged on the surface layer of the substrate can be controlled to uniform depth throughout, whereby the amount of solder connecting a plurality of electrodes on the substrate to electronic components can be made uniform throughout. Additionally, it is a simple matter to increase the amount of solder connecting a plurality of electrodes on the substrate to electronic components by increasing film thickness, for example. It is accordingly possible to mount electronic components on a substrate without incurring excessive or insufficient quantities of solder. The simplicity and accuracy of the procedure of providing a film with a plurality of window portions corresponding to a plurality of electrodes on a substrate also makes the process adaptable to finer pitch of a plurality of electrodes.
In a third aspect the invention provides an electronic component mounting structure wherein electronic components are mounted on a substrate having a surface layer with a plurality of recesses formed therein, these electronic components being connected by means of solder to electrodes situated with the recesses on said substrate, wherein a film having a plurality of window portions communicating with said recess is formed on said surface layer.
This third aspect of the invention represents a mounting structure realized through the mounting method of the second aspect described above, and as such affords the same advantages as the second aspect.
These and other features and advantages of the invention will be apparent from the following description of the embodiments.